phase-locked clock

См. также в других словарях:

• Phase-locked loop — PLL redirects here. For other uses, see PLL (disambiguation). A phase locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input reference signal. It is an electronic… …   Wikipedia

• Phase noise — is the frequency domain representation of rapid, short term, random fluctuations in the phase of a wave, caused by time domain instabilities ( jitter ). Generally speaking radio frequency engineers speak of the phase noise of an oscillator,… …   Wikipedia

• Clock recovery — Some digital data streams, especially high speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive) are sent without an accompanying clock signal. The receiver generates a clock from an approximate… …   Wikipedia

• Phase detector — A phase detector is a frequency mixer or analog multiplier circuit that generates a voltage signal which represents the difference in phase between two signal inputs. It is an essential element of the phase locked loop (PLL).Detecting phase… …   Wikipedia

• Phase Frequency Detector — A phase frequency detector, in electronics, is a device which compares the phase of two input signals. It has two inputs which correspond to two different input signals, usually one from a voltage controlled oscillator (VCO) and another from some …   Wikipedia

• Clock — For other uses, see Clock (disambiguation). Timepiece redirects here. For the Kenny Rogers album, see Timepiece (album). Platform clock at King s Cross railway station, London …   Wikipedia

• Clock of the Long Now — The first prototype, on display at the Science Museum in London. The Clock of the Long Now, also called the 10,000 year clock, is a proposed mechanical clock designed to keep time for 10,000 years. The project to build it is part of the Long Now… …   Wikipedia

• Clock Recovery — Die Taktrückgewinnung (auch Symboltakt Synchronisation) in der digitalen Übertragungstechnik hat zum Ziel, aus einem empfangenen Digitalsignal den Sendetakt des Senders zu bestimmen und damit das zeitgenaue Abtasten des Empfangsignals zu… …   Deutsch Wikipedia

• Delay-locked loop — In electronics, a delay locked loop (DLL) is a digital circuit similar to a phase locked loop (PLL), with the main difference being the absence of an internal voltage controlled oscillator. A DLL can be used to change the phase of a clock signal… …   Wikipedia

• Speaking clock — A speaking clock service is used by people who wish to know the correct and accurate time. Speaking clock services are most commonly accessed by telephone.The format of the service is somewhat similar to those in radio time signal services. Every …   Wikipedia

• Digital Clock Manager — is a function for manipulating clock signals by: [1] Multiply and divide an incoming clock (DFS). Recondition a clock to, for example, ensure 50% duty cycle. Phase shift (DLL). Eliminate clock skew. See also Clock signal Delay locked loop Phase… …   Wikipedia